Non-Volatile Inverter With 3D Cylindrical Metal-Ferroelectric-Metal Capacitor Realizing Digitized Voltage Output for Computing-In-Memory

European Solid-State Electronics Research Conference (ESSERC)
10.1109/ESSERC66193.2025.11213963

On the Unusual HCI Degradation of Nanoscale Back-Bias RFETs in 22nm FDSOI Technology

European Solid-State Electronics Research Conference (ESSERC)
10.1109/ESSERC66193.2025.11213944

Speeding-Up Emerging Device Development Cycles by Generating Models via Machine-Learning directly from Electrical Measurements

IEEE European Solid-State Electronics Research Conference
>10.1109/ESSERC62670.2024.10719591

Small-Signal Characterization and Modelling of a Back Bias Reconfigurable Field Effect Transistor

 IEEE European Solid-State Electronics Research Conference
>10.1109/ESSERC62670.2024.10719561

Understanding the impact of the dielectric layer in modulating the TER of FTJ devices

 IEEE European Solid-State Electronics Research Conference
>10.1109/ESSERC62670.2024.10719445