The central aim of the research on Resistive Switching Devices is the development of materials and device structures, capable of changing their electrical resistance or capacitance by applying external voltages. The resistive memory device – the so called ReRAM – is one of the potential candidates for the realization of novel memories or storage class memory, since it is characterized by very fast access times, non-volatility, and low power consumption. A further interest for the adoption of these devices – which in the context of electronic circuit theory are also referred to as memristors – is the application of such reconfigurable devices in neuromorphic nano-circuits, exhibiting the united functionality of logic and memory in one device. NaMLab’s activities cover the deposition and modification of dielectric thin films and electrode layers, the physical and electrical characterization as well as the modeling of the switching properties.
NaMLab’s research focuses on niobium oxide (NbOx) based resistive switching devices. By variation of the fabrication process, electrode materials and thin film composition a large variety of different switching characteristics could be obtained. One of these characteristics is a thermally induced Poole-Frenkel conduction‑based threshold switching effect that manifests itself by a negative differential resistance (NDR) branch in the current-voltage characteristics. Fig. 1 shows how the voltage extension of the NDR region ΔVNDR can be optimized by adjusting the thickness of the NbOx bottom layer within the multi-layer device. Experimental results reveal the prediction from simulations that are based on aphysical model description of these devices. ΔVNDR is an important parameter that defines the operation point when adopting these locally active devices e.g in oscillator circuits.
Fig. 2 shows a photograph of a circuit demonstration of two coupled locally active oscillators. The threshold switching devices were manufactured at NaMLab and were packaged by wire bonding so that they can be connected to complex circuits without suffering e.g. from parasitic cable capacitances that are unavoidable when probing the devices directly on silicon wafers.
A joint technology and design co-development is of utmost importance for advancing the technology readiness level of a novel device from the proof-of-concept (TRL 3) towards demonstration of the principle towards the component validation in a laboratory or even relevant environment (TRL4-5). In order to bridge the gap between the laboratory research and first industrial tests, NaMLab develops hybrid integration concepts where the novel devices are integrated into the back-end-of-line (BEOL) of standard CMOS chips (Fig. 3).
Dr. Stefan Slesazeck
Helmholtz Center Dresden Rossendorf (Germany), TU-BAF (Germany), RWTH Aachen (Germany), University of Helsinki (Finland), TU Dresden (Germany), GLOBALFOUNDRIES (Germany), Fraunhofer IPMS (Germany)