Since its foundation in 2006, one of NaMLab’s focus topics has been the development of future non-volatile memory (NVM) devices. This research encompasses material and device development for resistive switching (ReRAM) and threshold switching devices, as well as different flavors of ferroelectric memory devices, such as ferroelectric field effect transistors (FeFET) or ferroelectric tunneling junctions (FTJ). This research is accompanied by the development of more conventional devices, such as SONOS charge trapping transistors. Detailed electrical characterization and modeling of these device concepts, as well as optimization of their operation modes, is part of our key expertise.
In recent years, the focus of our work has extended more and more beyond pure memory applications towards the implementation of novel computing architectures. Classification tasks in modern applications such as image and audio recognition, autonomous driving, smart sensors signal processing, or machine learning, require a transition from the conventional compute-centric to a more data-centric architecture in future electronic systems. Thereby, one promising approach is to repeal the concept of physical separation between computing and the memory unit. In this context, NVM devices play a crucial role while being utilized, for example, as synaptic weighting elements and as such act as both storage and computing elements. In this field we see our main contribution in providing solutions for interfacing the novel NVM devices with conventional CMOS circuits.
Material and Device Development for Non-Volatile Memories: Interfacial switching valence change devices (VCM) and ferroelectric tunneling junctions (FTJ) both are considered as extremely energy-efficient two-terminal memory devices suitable for highly parallel analogue in-memory-computing due to their intrinsic high-impedance properties. The main focus of the work is the engineering and optimization of the electrode and material stacks that form the memristors. We fabricate these devices in our clean room and integrate them together with conventional CMOS transistors in order to explore their suitability and performance in memory and non-volatile computing applications on system level.


Model Building and Circuit Design for In-Memory-Computing platforms. Based on the electrical characterization results from emerging memory devices such as ferroelectric tunneling junctions and resistive switching devices fabricated in our own cleanroom, or ferroelectric field effect transistors provided by partners such as GLOBALFOUNDRIES, we generate simulation models that are needed for circuit designs. Utilizing these models, together with our partners we develop digital and analog circuits for a variety of applications, including driver circuits and sense-amplifiers for memory and in-memory-computing arrays, or digital circuit building blocks such as non-volatile latches and content-addressable memory (CAM) cells.
Back-End-Of-Line Integration of Emerging Memory Devices. With our increasing focus on co-integration of emerging devices with conventional CMOS technologies we are seeking to bridge the gap between academic research on material and device level and the industrial research and development on application level. Thereby, we obtain special engineering wafers from foundries and post-process the emerging memory devices in the BEOL of these substrates. This approach allows proof-of-concept demonstration of emerging computing concepts based on own circuit designs and characterization with statistical relevance long before the novel device concepts are available from commercial foundry processes. Working on coupon level instead of full wafer level allows extremely short learning cycles.


Novel Computing Architectures Based on Local Activity. Local activity is the ability of a system to amplify infinitesimal fluctuations in energy and is seen as one prerequisite for the emergence of complex behavior in non-linear systems. In our work we develop device concepts and circuits that utilize local activity in negative-differential-resistance (NDR) switching devices. Thereby, the current focus is the realization of integrated energy-efficient coupled oscillator arrays that offer the opportunity for efficient solving of optimization problems.





